Applied Materials reveals chip wiring innovations for energy-efficient computing

by | Jul 8, 2024 | Technology

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Applied Materials has revealed chip wiring innovations that will help address challenges in the way of energy-efficient computing.

The use of new materials in chip wiring will enable two-nanometer node manufacturing, where the width between circuits is around two billionths of a meter apart. These innovations will reduce resistance in wiring as much as 25% and new materials will reduce chip capacitance by up to 3%.

Chip makers are using the advances in the manufacturing of logic chips now and memory chip makers (who make dynamic random access memory, or DRAM) are evaluating it now for improved 3D chip stacking.

The mission is to ultimately enable equipment that can build a trillion-transistor chip such as a graphics processing unit, according to a story in the IEEE Spectrum journal. It’s tough to keep up with the pace of Moore’s Law, the 1965 prediction by former Intel CEO Gordon Moore that holds the number of components on a chip will double every couple of years. Instead of getting smaller, chips are getting bigger and multiple chips are being integrated into a single solution using advanced packaging.

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The good thing is that the chip industry has been able to get a three times improvement every two years over th …

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We want to hear from you! Take our quick AI survey and share your insights on the current state of AI, how you’re implementing it, and what you expect to see in the future. Learn More

Applied Materials has revealed chip wiring innovations that will help address challenges in the way of energy-efficient computing.

The use of new materials in chip wiring will enable two-nanometer node manufacturing, where the width between circuits is around two billionths of a meter apart. These innovations will reduce resistance in wiring as much as 25% and new materials will reduce chip capacitance by up to 3%.

Chip makers are using the advances in the manufacturing of logic chips now and memory chip makers (who make dynamic random access memory, or DRAM) are evaluating it now for improved 3D chip stacking.

The mission is to ultimately enable equipment that can build a trillion-transistor chip such as a graphics processing unit, according to a story in the IEEE Spectrum journal. It’s tough to keep up with the pace of Moore’s Law, the 1965 prediction by former Intel CEO Gordon Moore that holds the number of components on a chip will double every couple of years. Instead of getting smaller, chips are getting bigger and multiple chips are being integrated into a single solution using advanced packaging.

Countdown to VB Transform 2024

Join enterprise leaders in San Francisco from July 9 to 11 for our flagship AI event. Connect with peers, explore the opportunities and challenges of Generative AI, and learn how to integrate AI applications into your industry. Register Now

The good thing is that the chip industry has been able to get a three times improvement every two years over th …nnDiscussion:nn” ai_name=”RocketNews AI: ” start_sentence=”Can I tell you more about this article?” text_input_placeholder=”Type ‘Yes'”]

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